The statements in this section merely provide background information related to the present disclosure and may not constitute prior art.
Numerous bus systems exist for communication between two or more electrical devices or components. One common type of bus system is a two-wire serial bus.
FIG. 1 is a diagram of an example two-wire communication configuration, generally indicated by the reference numeral 100, suitable for inter-integrated circuit (I2C), Serial Peripheral Interface (SPI) and Serial Communications Interface (SCI) communications protocols. All of the clock outputs 102a-102n from a plurality of master devices 104a-104n are commonly coupled to a single clock input port 106 in a slave device 108. Similarly, all of the data outputs 110a-110n from the master devices 104a-104n are commonly coupled to a single data input port 112 of the slave device 108.
Using such a configuration, the slave device 108 is unable to determine which master device 104a-104n is sending data to the slave device 108. The slave device 108 only knows that it is receiving data from a master device 104a-104n. It does not know from which master device 104a-104n it is receiving data, or whether there is more than one master device. Likewise, the slave device 108 is unable to determine if any of the master devices 104a-104n are coupled more than one time to the slave device 108. To overcome these deficiencies, a third line, known as a slave select line, is often added to instruct the slave device 108 which master device 104a-104n is communicating with the slave device 108. This requires additional lines between the master devices 104a-104n and slave devices 108 and increases the expense and complexity of the circuit. Alternatively, a unique identifier can be transmitted to identify from which master device 104a-104n data is being sent. This option, however, increases the complexity of the master devices 104a-104n and the slave devices 108, requires tight control over the unique identifiers, increases the amount of data being sent and/or limits the variability and scalability of the system.